Functional Safety Engineering

SIS Detailed Design & Lifecycle Verification

IEC 61511 Phase 6–12 — architecture, FMEDA-graded components, FAT/SAT, Safety Manual, and cybersecurity

Technical overview

SIS Detailed Design
& Lifecycle Verification

SIS design translates the Safety Requirements Specification (SRS) into an as-built protection system that achieves and sustains the allocated SIL across the lifecycle. The discipline integrates sensor selection (transmitter type, redundancy, partial proof-test coverage), logic-solver architecture (TÜV / exida-certified safety PLCs — Triconex, HIMA, ABB AC800M HI, Yokogawa ProSafe-RS, Siemens S7-410F), final-element specification (block valve actuation, fail-safe direction, partial-stroke testing capability, fugitive-emission tightness per ISO 15848), and the cabling, networking, power supply, and HMI architecture that surrounds them. The 2016 revision of IEC 61511 Ed.2 tightened design requirements significantly — explicit cybersecurity treatment per Cl.8.2.4 (now mandating IEC 62443 alignment), restricted BPCS-SIS sharing of sensors, formalised prior-use justification for non-certified devices, and required Safety Manual generation per Cl.16. Common audit findings now cluster on sensor common-cause separation (transmitter mounting, impulse-line geometry, calibration drift), final-element diagnostic coverage and partial-stroke testing realism, beta-factor scoring honesty, and the cybersecurity dimension that 1990s-era SIS programmes rarely addressed.

SIS Detailed Design & Lifecycle Verification — Overview
Engineering process

SIS Detailed Design & Lifecycle Verification workflow

SRS Review & Design Basis

Review approved SRS for completeness; establish SIS design basis with architecture targets, redundancy strategy, and cybersecurity zone definition; align with IEC 61511 Phase 6 design and engineering requirements.

Logic Solver & Platform Selection

Select TÜV-certified safety logic solver (Triconex, HIMA, ABB AC800M HI, AB GuardLogix); justify prior-use per IEC 61511 Cl.11.5.3; specify platform certification (SIL 2 / SIL 3 / SIL 4 capable); align with IEC 62443 cybersecurity requirements.

Sensor & Final Element Specification

Specify sensors with FMEDA data — pressure (Rosemount 3051SIS / E+H Cerabar), temperature (RTD/TC with safety transmitter), level (radar/DP), flow (vortex/coriolis); specify final elements — ESD valves (Mokveld, Velan) with API 6FA fire-safe, partial-stroke capable for SIL ≥2.

Architecture & Voting Design

Design voting architecture (1oo1D, 1oo2, 2oo3) per SIL target, MTTFS (spurious trip), and CCF mitigation; specify diverse sensors / separated cabinets / independent power for high-CCF risk; align with IEC 61508 Route 1H or 2H per design tolerance.

Cybersecurity & Network Isolation

Implement IEC 62443 zone-and-conduit architecture — SIS zone isolated from BPCS via uni-directional data diode or firewall; specify access control, audit log, USB lockdown; align with NIST SP 800-82 OT security guidance.

FAT / SAT & Safety Manual Compilation

Develop FAT procedure exercising every SIF cause-and-effect; SAT with end-to-end loop testing; produce Safety Manual per IEC 61511 Cl.16 covering operating, proof-testing, bypass, MOC procedures; align with FSA Stage 2 / 3 examination.

SIS Detailed Design & Lifecycle Verification — Scope
Scope of work

Every deliverable — from basis to handover

Complete SIS Detailed Design & Lifecycle Verification scope — every calculation, drawing, specification, and construction support activity.

Architecture selection — 1oo1 (lowest cost), 1oo1D (with diagnostics), 1oo2 (high availability), 2oo2D, 2oo3 (high SIL + spurious-trip resistance)
Sensor selection — type (transmitter, switch), redundancy, common-cause separation
Final-element specification — fail-direction, actuator sizing, partial-stroke testing (PST) capability, ISO 15848 emission tightness
TÜV / exida-certified logic solver selection (Triconex, HIMA, ABB AC800M HI, ProSafe-RS, S7-410F)
Hardware fault tolerance and architectural constraints per IEC 61511 Cl.11 (Route 1H / 2H)
Beta-factor calibration per IEC 61508-6 Annex D scoring against installation context
Independence from BPCS — sensors, logic, final elements, power, networking
FMEDA-grade reliability data per device (failure rates, SFF, DC) sourced from manufacturer safety manuals
Cybersecurity zone-and-conduit per IEC 62443 — segregation from corporate IT, secure remote access
FAT and SAT planning with end-to-end loop testing per ISA TR84.00.04
Engineering outcomes

Outcomes of SIS Detailed Design & Lifecycle Verification

SIS Architecture Integrity
  • Achieves the target SIL with engineered architecture — not optimistic claim
  • Eliminates BPCS-SIS sharing patterns that fail IEC 61511 independence test
  • Addresses the silent partial-stroke-test-coverage gap on critical block valves
  • Closes the cybersecurity exposure historically ignored in 1990s-era SIS
IEC 61511 SIS Design Defence
  • IEC 61511 Ed.2 audit-defensible design with documented prior-use justification
  • Withstands TÜV / exida / third-party FSA Stage 2/3 examination
  • Aligns with IEC 62443 cybersecurity zone-and-conduit requirements
  • Supports COMAH / Seveso operational-control SIS evidence
SIS Availability & Proof-Test Optimisation
  • Reduces spurious-trip frequency through MTTFS-aware architecture
  • Sharpens proof-test design — covering unrevealed failure modes honestly
  • Enables online partial-stroke testing on critical block valves
  • Builds Safety Manual content that survives operating-team handover
SIS Lifecycle Cost Efficiency
  • Right-sizes SIL and architecture — avoiding the SIL-3-everywhere capex pattern
  • Reduces commissioning rework through FAT-quality verification
  • Cuts spurious-trip business-interruption — typical 50–80% reduction vs legacy SIS
  • Trims lifecycle SIS maintenance through diagnostic-coverage credit
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